IJRR

International Journal of Research and Review

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Research Paper

Year: 2022 | Month: November | Volume: 9 | Issue: 11 | Pages: 54-59

DOI: https://doi.org/10.52403/ijrr.20221108

I2C Master Scan Chain Insertion and Functional Coverage

Nagendra Prasad N1, Dr. Kiran V2

1,2Department of Electronics and Communication, R.V College of Engineering, VTU University, Bangalore, India

Corresponding Author: Nagendra Prasad N

ABSTRACT

I2C is a serial, bidirectional bus for communication that Philips Semiconductors created. only two bus lines are needed a (SDA) serial data line and a (SCL) serial clock line. With the addition of scan chains, a method for I2C Bus testing has been implemented in this study. In order to achieve the necessary requirements, the number of scan chain insertions is predetermined. The coverage of the Functions is also performed to verify the test bench.

Keywords: I2C, Scan Chain, Coverage, Testing, Design for test

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